A voltage regulator provides a predetermined and substantially constant output voltage to a load from a voltage source that may be poorly-specified or fluctuating. One type of commonly used regulator is a switching regulator, which supplies a flow of current from a voltage source to a load in the form of discrete current pulses. To create the discrete current pulses, switching regulators usually employ a switch, such as a power transistor, to control the current supply. The current pulses are then converted into a steady load current with an inductive storage element. By controlling the duty cycle of this switch, i.e., the percentage of time that the switch is ON relative to the total period of the switching cycle, the switching regulator can regulate the load voltage.
In current-mode switching voltage regulators, i.e., a switching regulator that is controlled by a current-derived signal in the regulator, there is an inherent instability when the duty cycle exceeds 50% with fixed frequency and continuous current mode, and 67% with fixed frequency and discontinuous current mode (i.e., when the switch is ON for more than 50% or 67% of a given switching period). In order to maintain stability of such current-mode switching regulators, the current-derived signal used to control the regulator is adjusted by, for example, applying a slope compensation signal.
One method of producing such a slope compensation signal is to use a portion of an oscillator signal as the compensation signal. The oscillator signal may be, for example, a ramp signal that is used to generate a clock signal that controls the switching of the regulator. The slope compensation signal can be applied by either adding the ramp signal to the current-derived signal, or by subtracting it from a control signal.
FIG. 1 shows an example of a current-mode switching regulator 100 utilizing slope compensation. Voltage regulator 100 generally comprises an output circuit 110 and a control circuit 130. A switch timing circuit 112 that is capable of producing substantially in-phase ramp and clock signals supplies a control signal SW ON that sets a latch 114. While latch 114 is set, it provides a signal to output circuit 110 that causes a switch 108 to turn ON and provide current from an input voltage source VIN to an output node 109. Latch 114 remains set until an output signal from a current comparator 122 causes latch 114 to reset. When reset, latch 114 turns switch 108 OFF so that current is no longer drawn from VIN. Current comparator 122 determines when to reset latch 114 by comparing a signal that is indicative of the current supplied to output circuit 110 with a signal representing a current threshold value, i.e., a voltage across resistor 128, generated by an error amplifier 124 and a slope compensation signal ISC.
The primary purpose of output circuit 110 is to provide current pulses as directed by control circuit 130, and to convert those current pulses into a substantially constant output current. Output circuit 110 includes power switch 108 coupled to VIN (through a sensing resistor 132) and a node 107, a catch diode 102 coupled from node 107 to ground, an inductor 104 coupled from node 107 to output node 109, and a capacitor 106 coupled from output node 109 to ground. Although switching element 108 is depicted as a bipolar junction transistor (BJT), any other suitable switching element may be used if desired.
The operation of output circuit 110 can be divided into two periods. The first is when power switch 108 is ON, and the second is when power switch 108 is OFF. During the ON period, current passes from VIN through switch 108 and flows through inductor 104 to output node 109. During this period, catch diode 102 is reverse-biased. After power switch 108 turns OFF, however, inductor 104 still has current flowing through it. The former current path from VIN through switch 108 is now open-circuited, causing the voltage at node 107 to drop such that catch diode 102 becomes forward-biased and starts to conduct. This maintains a closed current loop through the load. When power switch 108 turns ON again, the voltage at node 107 rises such that catch diode 102 becomes reverse-biased and again turns OFF.
As shown in FIG. 1, error amplifier 124 senses the output voltage of regulator 100 via a feedback signal VFB. Error amplifier 124, which is preferably a transconductance amplifier, compares VFB with a reference voltage 116 (VREF) that is also connected to amplifier 124. A control signal, VC, is generated in response to this comparison. The VC control signal is filtered by a capacitor 127 and coupled to the emitter of PNP transistor 118 and the base of NPN transistor 126. The VC signal controls transistor 126. When the value of VC is large enough to turn transistor 126 ON, current flows through resistor 128 and a voltage across resistor 128 is developed. Generally speaking, the value of this voltage is dependent on VC. As VC increases, so does the voltage across resistor 128 and vice versa.
The value of the voltage across resistor 128 establishes the threshold point at which current comparator 122 trips. Therefore, as the voltage across resistor 128 increases, the current threshold at which switch 108 turns off also increases to maintain a substantially constant output voltage. However, as mentioned above, current-mode voltage regulators can become unstable when the duty cycle exceeds 50% with fixed frequency and continuous current mode. To prevent this instability, a duty cycle proportional slope compensation signal may be subtracted from the feedback signal, i.e., the voltage across resistor 128, to increase the rate of current rise perceived by comparator 122. This is accomplished in FIG. 1 by applying the ramp signal from switch timing circuit 112 to a node between the emitter of transistor 126 and a resistor 125 (through a circuit generally depicted as controlled current source 113). As the ramp signal progresses toward its peak, the current injected at the emitter of transistor 126 increases, reducing its collector current, which causes the voltage across resistor 128 to decrease. Current comparator 122 interprets this as an increase in the rate of current rise in inductor 104. This causes the perceived rate of current rise in inductor 104 to be greater than the rate of current fall, which allows regulator 100 to operate at duty cycles greater than 50% without the duty cycle becoming unstable.
To prevent damage to switch 108, the maximum operating current of regulator 100 is limited to a certain level by placing a voltage clamp on the VC signal. Such a voltage clamp is typically implemented as shown in FIG. 1 using a PNP transistor 118 and a fixed voltage source 120. As long as the value of VC remains within a permissible operating range, voltage source 120 keeps the emitter-base junction of transistor 118 reverse-biased so that it acts as an open circuit. However, when VC attempts to rise above a preset maximum value, transistor 118 turns ON and starts to conduct. This diverts excess current away from the loop filter so that the voltage VC always remains at or below the preset maximum.
One undesirable consequence of slope compensation is that the true maximum current that can pass through switch 108 decreases proportionally as the duty cycle increases. This is because as the duty cycle increases, the effective magnitude of the slope compensation signal (ISC) also increases, causing a significant decrease in voltage across resistor 128 during the latter ON portion of the duty cycle. This phenomenon is of concern to circuit designers because it prevents the full current supplying capabilities of regulator 100 from being utilized at higher duty cycles.
One way to correct this problem is to let VC rise above the maximum level imposed by the voltage clamp when slope compensation is used. This allows the maximum value of voltage across resistor 132 to remain substantially constant rather than decrease as the amount of slope compensation increases. Merely increasing the clamp voltage directly (e.g., by increasing the value of voltage source 120 with a signal varying at the compensation ramp rate) is not a viable solution because the large time constant of capacitor 127 will not allow the peak value of VC to respond to a changing clamp threshold fast enough. Moreover, simply adding the compensation voltage directly to VC nulls the effect of slope compensation.
An alternative approach to maintain the same value of maximum current that can pass through switch 108 is to dynamically adjust the value of the limiter so that the effective maximum value of the supplied current to the inductor remains the same as when no compensating ramp is used, but the voltage Vc on the filter 127 is not changed at the clock rate. An exemplary circuit that dynamically adjusts the value of the limiter is shown in FIG. 2. Similar to the circuit of FIG. 1, the regulator of FIG. 2 includes output circuit 110, switch timing circuit 112, latch 114, reference voltage 116, comparator 122, error amplifier 124, resistors 125, 128, 132, transistor 126, and capacitor 127. In FIG. 2, regulator 200 has been modified by adding buffer circuit 140, adjustable voltage clamp circuit 150, and slope compensation circuit 160. With the addition of buffer 140, the VC clamp threshold can be adjusted by the slope compensation signal without changing the instantaneous value of Vc so that a substantially constant maximum current limit can be maintained at greater duty cycles. Detailed discussions of regulators with adjustable clamp circuit can be found in, for example, U.S. Pat. No. 6,498,466, titled “CANCELLATION OF SLOPE COMPENSATION EFFECT ON CURRENT LIMIT.”
However, the additional components, such as the buffer circuit 140 and the adjustable voltage clamp circuit 150, that are needed to implement an adjustable limiter voltage as shown in FIG. 2 increase cost and design complexity. Furthermore, the use of two compensation currents, ISC1 and ISC2 in the circuit shown in FIG. 2 also add design complexity. The additional circuits needed in the circuit 210 shown in FIG. 2 also increase the die size of the part, which is undesirable in integrated circuit or semiconductor component designs. Moreover, the use of additional components, especially active components such as amplifiers, would increase consumption of power. Therefore, there is a need for a simpler circuit design for switching regulators with effective slope compensation.